Power field-effect transistor (FET), pre-driver, controller, and sense resistor integration
In described examples of techniques for integrating power field-effect transistors (FETs), pre-drivers, controllers, and/or resistors into a common multi-chip package for implementing multi-phase bridge circuits, the techniques may provide a multi-chip package (62) with at least two high-side (HS) F...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | In described examples of techniques for integrating power field-effect transistors (FETs), pre-drivers, controllers, and/or resistors into a common multi-chip package for implementing multi-phase bridge circuits, the techniques may provide a multi-chip package (62) with at least two high-side (HS) FETs (80) and at least two low-side (LS) FETs (82, 84, 86), and place the at least two HS FETs or the at least LS FETs on a common die (80). Placing at least two FETs on a common die may reduce the number of die and the number of thermal pads (i.e., die pads) needed to implement a set of power FETs, thereby decreasing component count of a multi-phase bridge circuit and/or allowing a more compact, higher current density multi-phase bridge circuit to be obtained without significantly increasing thermal power dissipation of the circuit.
在用于将功率场效应晶体管(FET)、预驱动器、控制器和/或电阻器集成到公共多芯片封装中用于实现多相桥接电路的技术的所述实例中,所述技术可以提供具有至少两个高侧(HS)FET(80)和至少两个低侧(LS)FET(82、84、86)的多芯片封装(62),并且将所述至少两个HS FET或所述至少LS FET放置在公共管芯(80)上。将至少两个FET放置在公共管芯上可以减少实 |
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