Multi-epitaxial semiconductor device and manufacturing method thereof
The invention provides a multi-epitaxial semiconductor device and a manufacturing method thereof. A cellular structure of the multi-epitaxial semiconductor device comprises a substrate, an epitaxial layer, an STI isolation part, a P trap, a P-type heavily doped zone, an N-type heavily doped zone, a...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention provides a multi-epitaxial semiconductor device and a manufacturing method thereof. A cellular structure of the multi-epitaxial semiconductor device comprises a substrate, an epitaxial layer, an STI isolation part, a P trap, a P-type heavily doped zone, an N-type heavily doped zone, a DMOS source electrode, a contact electrode of the first P trap, a DMOS gate electrode, a PMOS gate electrode, an NMOS gate electrode, a source electrode, a drain electrode, a BJT base electrode, a BJT emitter electrode, and a BJT collector electrode. Mask plate in an Nwell zone in terms of a BCD process are reduced, so costs of products in batch production are reduced, and competitiveness of products is improved. The concentration of the epitaxial layer serving as the Nwell zone is increased, so the number of carriers is increased when a DMOS device is in an open state. In this way, specific on-resistance of a DMOS is further reduced, the loss of the device is reduced, and the performance of the device is improved. |
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