Gallium-nitride-based inverter chip and forming method therefor

The invention discloses a gallium-nitride-based inverter chip and a forming method therefor, and the chip comprises a substrate; a gallium nitride channel layer located on the substrate; a barrier layer located on the gallium nitride channel layer; a P-type III-family metal nitride layer located on...

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Hauptverfasser: LI CHEN, LIU CHUNXUE, ZHAO BEIJI, YAN FAWANG, ZHANG FENG
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creator LI CHEN
LIU CHUNXUE
ZHAO BEIJI
YAN FAWANG
ZHANG FENG
description The invention discloses a gallium-nitride-based inverter chip and a forming method therefor, and the chip comprises a substrate; a gallium nitride channel layer located on the substrate; a barrier layer located on the gallium nitride channel layer; a P-type III-family metal nitride layer located on the surface of the barrier layer; a first electrode located on the surface of the P-type III-family metal nitride layer; a second electrode, a third electrode and a fourth electrode, which are all located on the surface of the barrier layer. The chip is good in transmission performance, and is strong in loading capability. 种氮化镓基反相器芯片及其形成方法,所述氮化镓基反相器芯片包括:衬底;位于所述衬底上的氮化镓沟道层;位于所述氮化镓沟道层上的势垒层;位于部分势垒层表面的P型III族金属氮化物层;位于所述P型III族金属氮化物层表面的第电极;位于所述势垒层表面第二电极、第三电极和第四电极。所述氮化镓基反相器芯片具有良好的传输性和强的带负载能力。
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN106910770A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN106910770A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN106910770A3</originalsourceid><addsrcrecordid>eNrjZLB3T8zJySzN1c3LLCnKTEnVTUosTk1RyMwrSy0qSS1SSM7ILFBIzEtRSMsvys3MS1fITS3JyE9RKMlILUoFivEwsKYl5hSn8kJpbgZFN9cQZw_d1IL8-NTigsTk1LzUknhnP0MDM0tDA3NzA0djYtQAAKHYMQ8</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Gallium-nitride-based inverter chip and forming method therefor</title><source>esp@cenet</source><creator>LI CHEN ; LIU CHUNXUE ; ZHAO BEIJI ; YAN FAWANG ; ZHANG FENG</creator><creatorcontrib>LI CHEN ; LIU CHUNXUE ; ZHAO BEIJI ; YAN FAWANG ; ZHANG FENG</creatorcontrib><description>The invention discloses a gallium-nitride-based inverter chip and a forming method therefor, and the chip comprises a substrate; a gallium nitride channel layer located on the substrate; a barrier layer located on the gallium nitride channel layer; a P-type III-family metal nitride layer located on the surface of the barrier layer; a first electrode located on the surface of the P-type III-family metal nitride layer; a second electrode, a third electrode and a fourth electrode, which are all located on the surface of the barrier layer. The chip is good in transmission performance, and is strong in loading capability. 种氮化镓基反相器芯片及其形成方法,所述氮化镓基反相器芯片包括:衬底;位于所述衬底上的氮化镓沟道层;位于所述氮化镓沟道层上的势垒层;位于部分势垒层表面的P型III族金属氮化物层;位于所述P型III族金属氮化物层表面的第电极;位于所述势垒层表面第二电极、第三电极和第四电极。所述氮化镓基反相器芯片具有良好的传输性和强的带负载能力。</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20170630&amp;DB=EPODOC&amp;CC=CN&amp;NR=106910770A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25547,76298</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20170630&amp;DB=EPODOC&amp;CC=CN&amp;NR=106910770A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LI CHEN</creatorcontrib><creatorcontrib>LIU CHUNXUE</creatorcontrib><creatorcontrib>ZHAO BEIJI</creatorcontrib><creatorcontrib>YAN FAWANG</creatorcontrib><creatorcontrib>ZHANG FENG</creatorcontrib><title>Gallium-nitride-based inverter chip and forming method therefor</title><description>The invention discloses a gallium-nitride-based inverter chip and a forming method therefor, and the chip comprises a substrate; a gallium nitride channel layer located on the substrate; a barrier layer located on the gallium nitride channel layer; a P-type III-family metal nitride layer located on the surface of the barrier layer; a first electrode located on the surface of the P-type III-family metal nitride layer; a second electrode, a third electrode and a fourth electrode, which are all located on the surface of the barrier layer. The chip is good in transmission performance, and is strong in loading capability. 种氮化镓基反相器芯片及其形成方法,所述氮化镓基反相器芯片包括:衬底;位于所述衬底上的氮化镓沟道层;位于所述氮化镓沟道层上的势垒层;位于部分势垒层表面的P型III族金属氮化物层;位于所述P型III族金属氮化物层表面的第电极;位于所述势垒层表面第二电极、第三电极和第四电极。所述氮化镓基反相器芯片具有良好的传输性和强的带负载能力。</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2017</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLB3T8zJySzN1c3LLCnKTEnVTUosTk1RyMwrSy0qSS1SSM7ILFBIzEtRSMsvys3MS1fITS3JyE9RKMlILUoFivEwsKYl5hSn8kJpbgZFN9cQZw_d1IL8-NTigsTk1LzUknhnP0MDM0tDA3NzA0djYtQAAKHYMQ8</recordid><startdate>20170630</startdate><enddate>20170630</enddate><creator>LI CHEN</creator><creator>LIU CHUNXUE</creator><creator>ZHAO BEIJI</creator><creator>YAN FAWANG</creator><creator>ZHANG FENG</creator><scope>EVB</scope></search><sort><creationdate>20170630</creationdate><title>Gallium-nitride-based inverter chip and forming method therefor</title><author>LI CHEN ; LIU CHUNXUE ; ZHAO BEIJI ; YAN FAWANG ; ZHANG FENG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN106910770A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2017</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>LI CHEN</creatorcontrib><creatorcontrib>LIU CHUNXUE</creatorcontrib><creatorcontrib>ZHAO BEIJI</creatorcontrib><creatorcontrib>YAN FAWANG</creatorcontrib><creatorcontrib>ZHANG FENG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LI CHEN</au><au>LIU CHUNXUE</au><au>ZHAO BEIJI</au><au>YAN FAWANG</au><au>ZHANG FENG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Gallium-nitride-based inverter chip and forming method therefor</title><date>2017-06-30</date><risdate>2017</risdate><abstract>The invention discloses a gallium-nitride-based inverter chip and a forming method therefor, and the chip comprises a substrate; a gallium nitride channel layer located on the substrate; a barrier layer located on the gallium nitride channel layer; a P-type III-family metal nitride layer located on the surface of the barrier layer; a first electrode located on the surface of the P-type III-family metal nitride layer; a second electrode, a third electrode and a fourth electrode, which are all located on the surface of the barrier layer. The chip is good in transmission performance, and is strong in loading capability. 种氮化镓基反相器芯片及其形成方法,所述氮化镓基反相器芯片包括:衬底;位于所述衬底上的氮化镓沟道层;位于所述氮化镓沟道层上的势垒层;位于部分势垒层表面的P型III族金属氮化物层;位于所述P型III族金属氮化物层表面的第电极;位于所述势垒层表面第二电极、第三电极和第四电极。所述氮化镓基反相器芯片具有良好的传输性和强的带负载能力。</abstract><oa>free_for_read</oa></addata></record>
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ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Gallium-nitride-based inverter chip and forming method therefor
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