GATE STRUCTURE AND METHOD OF FABRICATING THE SAME
A gate structure includes at least one spacer defining a gate region over a semiconductor substrate, a gate dielectric layer disposed on the gate region over the semiconductor substrate, a first work function metal layer disposed over the gate dielectric layer and lining a bottom surface of an inner...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A gate structure includes at least one spacer defining a gate region over a semiconductor substrate, a gate dielectric layer disposed on the gate region over the semiconductor substrate, a first work function metal layer disposed over the gate dielectric layer and lining a bottom surface of an inner sidewall of the spacer, and a filling metal partially wrapped by the first work function metal layer. The filling metal includes a first portion and a second portion, wherein the first portion is between the second portion and the semiconductor substrate, and the second portion is wider than the first portion.
本发明揭露种栅极结构及其制造方法。栅极结构包含至少间隔层在半导体基材上界定栅极区域,栅极介电层设置于该半导体基材栅极区域上,第功函数金属层设置于该栅极介电层上且铺设于该间隔层的内侧壁的底面,以及填充金属,该填充金属部分由该第功函数金属层包覆。该填充金属包含第部分以及第二部分,其中该第部分是介于该第二部分以及该半导体基材之间,该第二部分较第部分宽广。 |
---|