Display apparatus

A display apparatus includes a printed circuit board (PCB). A power management integrated circuit (PMIC) is mounted on the PCB and is configured to generate first to fourth gate clock signals and first to fourth inversion gate clock signals. A phase of the first gate clock signal partially overlaps a phase of the second to fourth gate clock signal. Each of the first to fourth inversion gate clock signals has a phase opposite to that of a respective one of the first to fourth gate clock signals. A gate driver generates a plurality of gate signals based on the first to fourth gate clock signals and the first to fourth inversion gate clock signals and applies the plurality of gate signals to a plurality of gate lines. A display panel is connected to the plurality of gate lines. 公开了种显示装置，包括印刷电路板(PCB)、电源管理集成电路(PMIC)、栅极驱动器和显示面板。电源管理集成电路(PMIC)安装在PCB上并配置为生成第栅极时钟信号至第四栅极时钟信号以及第反相栅极时钟信号至第四反相栅极时钟信号。第栅极时钟信号的相位与第二至第四栅极时钟信号的相位部分重叠。第反相栅极时钟信号至第四反相栅极时钟信号中的每个具有与第至第四栅极时钟信号中的对应的个栅极时钟信号的相位相反的相位。栅极驱动器基于第栅极时钟信号至第四栅极时钟信号和第反相栅极时钟信号至第四