One-bit full adder based on FinFET (Fin Field-Effect Transistor) device M3 structure mixed logic

The invention discloses a one-bit full adder based on FinFET (Fin Field-Effect Transistor) device M3 structure mixed logic. The one-bit full adder comprises a first FinFET, a second FinFET, a third FinFET, a fourth FinFET, a fifth FinFET, a sixth FinFET, a seventh FinFET, an eighth FinFET, a ninth FinFET, a tenth FinFET, an eleventh FinFET, a twelfth FinFET, a thirteenth FinFET, a fourteenth FinFET, a fifteenth FinFET, a sixteenth FinFET, a first inverter and a second inverter. The one-bit full adder has the advantages that on the basis of not influencing the circuit performance, the area, delay, power consumption and power consumption product are relatively low, and the drive capability is relatively high. 本发明公开了种基于FinFET器件M3结构混合逻辑的位全加器，包括第FinFET管、第二FinFET管、第三FinFET管、第四FinFET管、第五FinFET管、第六FinFET管、第七FinFET管、第八FinFET管、第九FinFET管、第十FinFET管、第十FinFET管、第十二FinFET管、第十三FinFET管、第十四FinFET管、第十五FinFET管、第十六FinFET管、第反相器和第二反相器；优点是在不影响电路性能的基础上，面积、延时、功耗和功耗延时积均较小，且驱动能力较强。