Memory system with uniform decoder and operating method of same

The invention discloses a memory system with a uniform decoder and an operating method of the same. The memory system includes a memory array including a plurality of memory cells, and an encoder operatively coupled to the memory array, for encoding an original data element to be programmed into the memory cells into a uniform data element in which the number of ''0''s approximately equals the number of ''1''s. 本发明公开了种具有均匀译码器的存储器系统及其操作方法，存储器系统包括存储器阵列，该存储器阵列包括多个存储单元，以及编码器，该编码器操作性地耦接该存储器阵列，编码被编程至这些存储单元中的原始数据元件为均匀数据元件，在该均匀数据元件中，「0」的数量大约等于「1」的数量。