Array substrate pixel connection structure and array substrate
The invention provides an array substrate pixel connection structure. The array substrate pixel connection structure comprises a plurality of data lines; the plurality of data lines are arrayed in parallel along a first direction; a plurality of grid lines are arrayed in parallel along a second dire...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention provides an array substrate pixel connection structure. The array substrate pixel connection structure comprises a plurality of data lines; the plurality of data lines are arrayed in parallel along a first direction; a plurality of grid lines are arrayed in parallel along a second direction; a plurality of sub-pixels are limited through crossing the plurality of data lines and the plurality of grid lines; a rectangular array is formed by the plurality of sub-pixels; each sub-pixel comprises a thin film transistor and a pixel electrode; the plurality of sub-pixels comprise a first sub-pixel row, a second sub-pixel row, a third sub-pixel row and a fourth sub-pixel row, which are arrayed in sequence along the second direction; the sub-pixels in the first sub-pixel row and the second sub-pixel row are connected with the data lines adjacent to the sub-pixels; the sub-pixels in the third sub-pixel row and the fourth sub-pixel row are connected with the data lines adjacent to the sub-pixels; the data l |
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