On-chip debug and diagnostic method, device and chip
The present invention provides an on-chip debug and diagnostic method, a device and a chip. The method comprises the steps of monitoring the interrupt trigger information; generating a stop clock signal, a freeze signal and an interrupt trigger flag based on the interrupt trigger information; accord...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The present invention provides an on-chip debug and diagnostic method, a device and a chip. The method comprises the steps of monitoring the interrupt trigger information; generating a stop clock signal, a freeze signal and an interrupt trigger flag based on the interrupt trigger information; according to the stop clock signal, closing a functional clock; according to the freeze signal, freezing the state of a non-debug module port; upon monitoring the interrupt trigger flag, recording the state of an internal trigger and the internal state of a memory; after the recording is completed, recovering the function of the clock. Based on the on-chip debug and diagnostic method, the device and the chip, the functional clock can be automatically closed when the chip goes wrong, and the operation of a processor is paused. Meanwhile, the debug and diagnostic function is triggered automatically, so that the internal state of the chip can be quickly and accurately acquired. The debugging capability of the chip is effect |
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