Reception Circuit, Method For Adjusting Timing In Reception Circuit, And Semiconductor Device

A reception circuit includes a control signal generation circuit that generates a first enable signal based on a strobe signal and a second enable signal based on a core clock signal and a pointer control signal. A pattern data generation circuit generates determination pattern data from the first enable signal. An asynchronous transfer circuit latches the determination pattern data based on the first enable signal and the strobe signal and outputs determination data corresponding to the latched determination pattern data based on the second enable signal and the core clock signal. A determination circuit determines a timing for generating the pointer control signal based on the determination data. A set value calculation circuit calculates a transfer set value based on the determination result of the determination circuit. The control signal generation circuit updates the pointer control signal based on the transfer set value. 本发明公开了接收电路、调整接收电路中的定时的方法及半导体器件。根据本发明的接收电路包括：控制信号生成电路，其基于选通信号生成第使能信号，并且基于核心时钟信号和指针控