Time deinterleaving circuit and execution time deinterleaving processing method

The invention discloses a time deinterleaving circuit and execution time deinterleaving processing method, which is applied to a communication system and is used for carrying out time deinterleaving processing on an interleaved signal, and the interleaved signal comprises a plurality of units. The time deinterleaving circuit comprises a memory module, used for storing these units, wherein these units form a plurality of unit groups with a plurality of units as unit, and the reading and writing of the memory module uses a unit group as unit; and a temporary memory module, used for temporarily storing the parts of these units to arrange the output sequence of these units. 本发明揭示了种时间解交错电路与执行时间解交错处理的方法，应用于通信系统，用来对交错信号进行时间解交错处理，该交错信号包含多个单元。该时间解交错电路包含：存储器模块，用来储存该些单元，该些单元以多个单元为单位形成多个单元组，该存储器模块的读写是以单元组为单位；以及暂存存储器模块，自该存储器模块暂存该些单元的部分，以安排该些单元的输出顺序。