SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

The present disclosure relates to a semiconductor package and method of manufacturing the same. The semiconductor package includes a first die, a plurality of conductive pads, a package body and a plurality of first traces. The plurality of conductive pads electrically connect to the first die, and...

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Bibliographische Detailangaben
Hauptverfasser: CHEN, WILLIAM T, SU, YUANANG, ESSIG, KAY STEFAN, APPELT, BERND KARL
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:The present disclosure relates to a semiconductor package and method of manufacturing the same. The semiconductor package includes a first die, a plurality of conductive pads, a package body and a plurality of first traces. The plurality of conductive pads electrically connect to the first die, and each of the plurality of conductive pads has a lower surface. The package body encapsulates the first die and the plurality of conductive pads and exposes the lower surface of each of the plurality of conductive pads from a lower surface of the package body. The plurality of first traces are disposed on the lower surface of the package body and are connected to the lower surface of each of the plurality of conductive pads. A thickness of each of the plurality of first traces is less than 100 [mu]m. 本发明涉及种半导体封装及其制造方法。所述半导体封装包含第裸片、多个导电垫、封装本体及多个第迹线。所述多个导电垫电连接到所述第裸片,且所述多个导电垫中的每者具有下部表面。所述封装本体囊封所述第裸片及所述多个导电垫,且使所述多个导电垫中的每者的所述下部表面从所述封装本体的下部表面暴露。所述多个第迹线安置于所述封装本体的所述下部表面上,且连接到所述多个导电垫中的每者的所述下部表面。所述多个第迹线中的每者的厚度小于100μm。