Testing system for aiming at 80C186 architecture interface board

The invention relates to a testing system for aiming at an 80C186 architecture interface board. The testing system comprises an FPGA least system circuit, a communication interface circuit, an Arinc429 signal transmitting circuit and a sequential logic control circuit. The FPGA least system is mainly composed of seven small parts, namely a clock input circuit, a resetting input circuit, a JTAG interface circuit, a program configuring circuit, a voltage supply circuit, a phase-locked loop circuit and an indicating lamp circuit. In the communication interface circuit, because a hardware language in which a serial-port communication protocol can be built is utilized on the FPGA, a corresponding adapter interface chip is utilized for RS232, RS422 and RS485 interface communication in the communication interface circuit. The testing system can supply a testing facility and a testing method for interface board testing of the 80C186 processor architecture board, thereby realizing quick product fault positioning, shor