SEMICONDUCTOR MEMORY DEVICE

A semiconductor memory device includes a first fuse set block including a fuse array for storing first repair information, and a control block configured to store second repair information in a first mode, and generate an output control signal when input addresses applied from an external source and the second repair information are the same, in a second mode, wherein the first fuse set block enables a first match signal for accessing a first redundancy memory cell when the stored first repair information and the input addresses are the same, and disables the first match signal in response to the output control signal. 种半导体存储器件，包括：第熔丝组块，包括用于储存第修复信息的熔丝阵列；以及控制块，被配置为在第模式中储存第二修复信息，以及在第二模式中当从外部源施加的输入地址与第二修复信息相同时产生输出控制信号，其中，第熔丝组块在储存的第修复信息与输入地址相同时使能用于访问第冗余存储单元的第匹配信号，以及响应于输出控制信号而禁止第匹配信号。