Diagnostic operation method, diagnostic method, and semiconductor device

In a memory to which an ECC decoder is coupled, it is possible to improve a failure detection rate of an address circuit of the memory without using address information to generate redundant bits and without rewriting the memory. The memory stores data of addresses different from each other and redundant bits added to the data in a plurality of memory cells sharing the same selection signal wiring (for example, a word line or a column line) and outputs read-out data corresponding to a specified address. An ECC decoder performs error detection on the read-out data. When an error is detected by the ECC decoder, a failure diagnosis of the memory is performed by accessing one or a plurality of addresses which are selected by the same selection signal wiring as selection signal wiring that selects read-out data where the error is detected and which are different from the address of the read-out data and evaluating a result of the error detection for the read-out data. 在带有ECC的存储器中，在不使用地址信息产生冗余位并且不重写存储器的情形下改善存储器的地址电