PSM mode adaptive voltage regulator based on output voltage segmentation

The invention discloses a PSM mode adaptive voltage regulator based on output voltage segmentation, and aims to provide a voltage regulator which is good in transient response characteristics and high in power conversion efficiency under light load and can effectively reduce power consumption of the CPU of a load processor. According to the technical scheme, a clock signal generator generates three clock signals including a load processor clock, a delay line resetting signal and a delay testing signal according to a control signal requested by an external CPU; compared with a rising edge of the delay testing signal, a rising edge of the delay line resetting signal is lagged by a clock period TS of the load processor clock signal; and when a testing signal in the TS is transmitted to a data input end of a trigger D2, the CPU of the load processor judges whether output voltage of a power converter can enable a key path of the CPU to work normally or not according to the transmission condition of the delay testi