Realization method for register clustering in clock tree synthesis

The invention provides a realization method for register clustering in clock tree synthesis. According to the register clustering method, a minimum spanning tree of clock tree registers is obtained in a minimum spanning tree construction mode by taking reduction of interconnection capacitance of a clock tree as a standard, so that the length of an interconnection line of the clock tree tends to a minimum value and the power consumption of the clock tree is reduced. During register clustering, a threshold of load capacitance is set for a register cluster, so that clock skew and clock delay of a local register cluster can be controlled. By allocating a most suitable buffer to the register cluster, the clock skew and the clock delay are reduced and a mark is made for the clock tree synthesis. The physical position of any register is not moved in the whole register clustering process, and an algorithm is realized by a Tcl language and compiled only in an ICCompiler to run, so that the operation can be simpler to