System chip capable of being debugged in abnormal state, and debugging method thereof

The invention discloses a system chip capable of being debugged in an abnormal state, and a debugging method thereof. A switching unit is connected with a function module through a first path, and is connected to a debugging connection hole of a processor through a second path. A pin unit is connected with the switching unit through a third path. The control module receives input data, outputs a selection signal to the switching unit, and decides the level of the selection signal according to the input data. The switching unit selects the third path to be connected to one of the first and second paths according to the selection signal. When the third path is connected to the second path, a debugging platform carries out the program debugging of the processor through a debugging connection interface. 种可于异常状态下进行调试的系统芯片及其调试方法。切换单元经由第路径连接功能模块并经由第二路径连接至处理器的调试连接接口。引脚单元经由第三路径连接切换单元。控制模块接收输入数据并输出选择信号至切换单元，并且依据输入数据来决定选择信号的电平。切换单元根据选择信号而选择将第三路径导通至第路径与第二路径其中之。当第三路径导通至第二路径，调试平台经由调试连接接口对处理器进行调试程序。