Optimization method for balancing loads of multiple chip mounters in assembly line in PCB assembling technology

The invention discloses an optimization method for balancing the loads of multiple chip mounters in an assembly line in PCB assembling technology. The method comprises steps of describing and analyzing an optimization problem of a PCB assembly production line; establishing a load balancing mathemati...

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Bibliographische Detailangaben
Hauptverfasser: WU FU, ZHOU YONG, FENG MIN, LI SUOPING, PENG DUO, LI SHAODONG, YANG XIJUAN, WU YUN, DOU ZUFANG, ZHOU YONGQIANG, AN ZAICHAO
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:The invention discloses an optimization method for balancing the loads of multiple chip mounters in an assembly line in PCB assembling technology. The method comprises steps of describing and analyzing an optimization problem of a PCB assembly production line; establishing a load balancing mathematic model according to the description and the analysis of the optimization problem; designing an algorithm according to the solution characteristic of the mathematic model to obtain a load-balanced component mounting sequence of the chip mounters; applying the load-balanced component mounting sequence to a production line control system in order to enable the chip mounters in the production line to mount components according to an optimum scheduling mode, wherein the algorithm is an intelligent optimization algorithm combining a cuckoo search algorithm with a particle swarm optimization algorithm. The method solves a load-balanced optimized scheduling mathematic model of the chip mounters in the production line and