Multiplex AND gate and OR gate selection circuit

The invention discloses a multiplex AND gate and OR gate selection circuit. By a multiplex structure of a transistor, structure design of simultaneously inputting an AND gate and an OR gate can be achieved in one circuit structure. Moreover, a selection circuit structure for selecting AND gate and OR gate output results is converted into a selection signal for selecting switching-on and switching-off of the transistor in the circuit, so that use of the transistor is reduced to a great extent and meanwhile, the circuit structure is also simplified.