Improved XOR gate logic unit circuit

The invention discloses an improved XOR gate logic unit circuit. The improved XOR gate logic unit circuit includes a first stage circuit composed of PMOS transistors P1 and P2 as well as NMOS transistors N1 and N2, and a second stage circuit composed of PMOS transistors P3, P4 and P5 as well as NMOS...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	LI WEI, SUN ZUAN, HU YINXIAO
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY ELECTRICITY PULSE TECHNIQUE
Online-Zugang:	Volltext bestellen
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