Write flow control for memory modules that include or interface with non-compliant memory technologies

Example embodiments relate to write flow control for memory modules that include or interface with non-compliant memory technologies. A memory module may include an interface to a memory bus and a memory controller that comply with a data transfer standard. The memory module may include a write buffer to receive write commands from the interface to the memory bus. The write buffer may cause the write commands to be transmitted to the non-compliant memory technology using a communication protocol that does not comply with the data transfer standard. The memory module may include a flow control credit counter to monitor the capacity of the write buffer, and to provide a credit count to the memory controller that indicates the number of write commands that the write buffer can accept.