Universal Serializer Architecture

Systems and methods for a universal Serializer-Deserializer (SerDes) architecture (400) are described. In various implementations, a transceiver may include: a first plurality of data flip-flops (402) coupled to a data lookup circuit (401) of a SerDes interface; a second plurality of data flip-flops (403) coupled to the data lookup circuit (401); a plurality of latches (404), each latch of the plurality of latches (404) coupled to a corresponding data flip-flop of the second plurality of data flip-flops (403); and a plurality of multiplexers (405) coupled to the plurality of latches (404), to the first plurality of data flip-flops (402), and to a transmitter circuit.