Device for realizing base-2 exponential or logarithmic computation of vector floating point

The invention provides a device for realizing base-2 exponential or logarithmic computation of a vector floating point. The device comprises a vector register group, a group of data selectors of a floating point number, a group of floating point transcendental function computing units and a control...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: HE MIAOPING
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:The invention provides a device for realizing base-2 exponential or logarithmic computation of a vector floating point. The device comprises a vector register group, a group of data selectors of a floating point number, a group of floating point transcendental function computing units and a control logic unit, wherein the vector register group comprises at least one vector register, wherein a plurality of floating point data can be stored in each vector register; each data selector of the floating point number is used for sending data read from each vector register to the corresponding floating point transcendental function computing unit after changing the order; each floating point transcendental function computing unit is used for carrying out single-precision floating point transcendental function computation and base-2 exponential or logarithmic computation of the floating point, wherein the number of the floating point transcendental function computing units is equal to the number of the floating point data in the vector registers; and the control logic unit is used for controlling data selection of one group of data selectors and operating function selection of the floating point transcendental function computing units. According to the device, the parallel computing property of vector data is utilized, computation of a plurality of floating point data can be simultaneously carried out, the computing speed is accelerated, and the execution cycle is reduced.