Package substrate and manufacturing method thereof
The invention relates to a package substrate and a manufacturing method thereof. According to the embodiment of the invention, the package substrate comprises at least one capacitance element and a multi-layer line structure, wherein the package substrate further comprises a metal top layer, a metal...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | The invention relates to a package substrate and a manufacturing method thereof. According to the embodiment of the invention, the package substrate comprises at least one capacitance element and a multi-layer line structure, wherein the package substrate further comprises a metal top layer, a metal bottom layer and at least one metal inner layer; the at least one metal inner layer is arranged between the metal top layer and the metal bottom layer; a top-layer line structure in the multi-layer line structure is arranged on the metal top layer; a bottom-layer line structure in the multi-layer line structure is arranged on the metal bottom layer; a side capacitance electrode plate of the at least one capacitance element and at least one inner-layer line structure in the multi-layer line structure are arranged on the at least one metal inner layer; and the thickness of the at least one inner-layer line structure is less than those of the top-layer line structure and the bottom-layer line structure. According to the package substrate and the manufacturing method thereof provided by the embodiment of the invention, high-quality embedded capacitance elements can be obtained; and the thickness of the package substrate is effectively controlled. |
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