Semiconductor memory

A synchronous dynamic random access memory is capable of accessing data in a memory cell array therein in synchronism with a system clock from an external system such as a central processing unit (CPU). The synchronous DRAM receives an external clock CLK and includes a plurality of memory banks 12,...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	PARK CHUROO, JANG HYUN-SOON, KIM CHULL-SOO
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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