Tamper resistant fuse design

A tamper resistant fuse design is generally presented. In this regard, an apparatus is introduced comprising a plurality of fuses in an integrated circuit device to store values and a plurality of resistors in parallel to the fuses, wherein each fuse includes a parallel resistor to provide a potenti...

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Bibliographische Detailangaben
Hauptverfasser: ZHIYONG MA, XIANGHONG SONG, JUN HE, ZHANPING CHEN, KEVIN X.ZHANG, KEVIN D.JOHNSON
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:A tamper resistant fuse design is generally presented. In this regard, an apparatus is introduced comprising a plurality of fuses in an integrated circuit device to store values and a plurality of resistors in parallel to the fuses, wherein each fuse includes a parallel resistor to provide a potential dissipation path around the fuse. Other embodiments are also described and claimed.