Safety hypervisor function

The present invention relates to safety hypervisor function. The disclosure relates to systems and methods for defining a processor safety privilege level for controlling a distributed memory access protection system. More specifically, a safety hypervisor function for accessing a bus in a computer processing system includes a module, such as a Computer Processing Unit (CPU) or a Direct Memory Access (DMY) for accessing a system memory and a memory unit for storing a safety code, such as a Processor Status Word (PSW) or a configuration register (DMA(REG)). The moduel allocate the safety code to a processing transanction and the safety code is visible upon access of the bus by the module.