Storage on-chip integrated structure based on power consumption control and control method therefor
The invention discloses a storage on-chip integrated structure based on power consumption control and a control method therefor. The storage on-chip integrated structure comprises a primary address decoder and a storage, wherein the storage comprises N secondary storage bodies; the storage is unifor...
Gespeichert in:
Hauptverfasser: | , , , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Schreiben Sie den ersten Kommentar!