Storage on-chip integrated structure based on power consumption control and control method therefor

The invention discloses a storage on-chip integrated structure based on power consumption control and a control method therefor. The storage on-chip integrated structure comprises a primary address decoder and a storage, wherein the storage comprises N secondary storage bodies; the storage is uniformly divided into M parallel groups; a bus address and a bus chip selection signal are accessed into the input end of the primary address decoder; the primary address decoder is provided with M group chip selection signal output ends which are connected with input ends of the M groups respectively; the input end of each group is further connected with a bus address and a bus data signal; a group data output signal of each group is connected to the input end of a first multi-path selector; and the first multi-path selector is controlled by a group data output selection signal of the primary address decoder to output a final data output signal. The storage on-chip integrated structure based on the power consumption control is not limited by the types and storage capacities of storage devices; and the dynamic power consumption of storage bodies on a large-capacity chip is obviously reduced under the condition that the performance of a microprocessor is not influenced.