Semiconductor package with single sided substrate design and manufacturing methods thereof

The invention discloses a semiconductor package and a manufacturing methods thereof. The semiconductor package includes a substrate unit, a die electrically connected to first contact pads, and a package body covering a first patterned conductive layer and the die. The substrate unit includes: (1) t...

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Bibliographische Detailangaben
Hauptverfasser: SU YUANANG, CHEN CHIANG, LI MINGJIN, HUANG SHIH-FU, CHEN TZU-HUI, CHEN KUANG-HSIUNG, HSIEH PAO-MING, HSIEH CHIA-HSIUNG
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:The invention discloses a semiconductor package and a manufacturing methods thereof. The semiconductor package includes a substrate unit, a die electrically connected to first contact pads, and a package body covering a first patterned conductive layer and the die. The substrate unit includes: (1) the first patterned conductive layer; (2) a first dielectric layer exposing a part of the first patterned conductive layer to form the first contact pads; (3) a second patterned conductive layer; (4) a second dielectric layer defining openings extending from the first patterned conductive layer to the second patterned conductive layer, where the second patterned conductive layer includes second contact pads exposed by the second dielectric layer; and (5) conductive posts extending from the first patterned conductive layer to the second contact pads through the openings, each of the conductive posts filling a corresponding one of the openings. At least one of the conductive posts defines a cavity.