Method for checking schematic diagram logic in real time
The invention discloses a method for checking schematic diagram logic in real time. Being different from a traditional checking method, after a schematic diagram is edited, a checking command does not need to be additionally started and the program can automatically call a schematic diagram checking...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | The invention discloses a method for checking schematic diagram logic in real time. Being different from a traditional checking method, after a schematic diagram is edited, a checking command does not need to be additionally started and the program can automatically call a schematic diagram checking function. Meanwhile, the program can automatically judge which data may be influenced by current operation, and the part of the data is subjected to real-time logic checking. If the automatic checking checks the problem, fault positions can be marked by using rectangular shapes with different colors by a user according to the configuration of fault serious degrees, so that the user can conveniently position the problem. A wire connection command is started to carry out wire connection; when the wire is not connected due to the incorrect operation of the user, the suspended errors of the end point of a connection wire and the end point of an MOS (Metal Oxide Semiconductor) tube can be displayed immediately in real time, and are marked by the black rectangular shapes. |
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