SiC MOS capacitor with Al2O3/La2O3/SiO2 stacked gate dielectric layer and manufacturing method of SiC MOS capacitor

The invention relates to a SiC MOS capacitor with an Al2O3/La2O3/SiO2 stacked gate dielectric layer and a manufacturing method of the SiC MOS capacitor. A SiC substrate is a heavy-doped SiC substrate layer and a light-doped SiC epitaxial layer is arranged on the SiC substrate layer; the stacked gate dielectric layer comprises a lower SiO2 transition layer, a La2O3 layer and an Al2O3 covering layer; the lower SiO2 transition layer is arranged on the SiC epitaxial layer; the La2O3 layer is arranged on the lower SiO2 transition layer; the Al2O3 covering layer is arranged on the La2O3 layer; positive and negative electrodes are connected with the surface of the Al2O3 covering layer and the back of the SiC substrate. The SiC MOS capacitor with the stacked gate dielectric layer has the advantages that the interface state density and the border trap density are reduced, the MOS channel mobility is enhanced, the gate leak current is reduced and the voltage endurance capability of the dielectric layer is improved; as a result, the quality of the SiC MOS capacitor is improved and the reliability of the capacitor is enhanced.