Graded sending dispatching circuit structure based on AFDX network switch chip
The invention provides a graded sending dispatching circuit structure based on an AFDX network switch chip. The sending dispatching structure comprises a host interface, a switch channel switch logic, a switch port queue control module, a host queue control module, an end system queue control module...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | The invention provides a graded sending dispatching circuit structure based on an AFDX network switch chip. The sending dispatching structure comprises a host interface, a switch channel switch logic, a switch port queue control module, a host queue control module, an end system queue control module, a catching queue control module and a sending dispatching arbiter. The graded sending dispatching circuit structure has the advantages that the size of buffer regions with high and low priorities of the switch port queue can be configured, meanwhile, a host interface and end system data request is dispatched, and the sending dispatching request of the switch port is fairly dispatched under the condition of ensuring high priority of the end system request. |
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