METHOD OF MANUFACTURING MOS-TYPE SEMICONDUCTOR DEVICE

A method of manufacturing a MOS-type semiconductor device capable of increasing the thickness of a gate oxide film and obtaining high gate withstanding power and reduced switching loss without increasing a gate threshold voltage Vth is provided. A p-type well region (3) is selectively formed on one...

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Bibliographische Detailangaben
Hauptverfasser: TAKEYOSHI NISHIMURA, SHUHEI TATEMICHI
Format: Patent
Sprache:eng
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Zusammenfassung:A method of manufacturing a MOS-type semiconductor device capable of increasing the thickness of a gate oxide film and obtaining high gate withstanding power and reduced switching loss without increasing a gate threshold voltage Vth is provided. A p-type well region (3) is selectively formed on one principle surface of a semiconductor substrate having an n-type low impurity concentration layer (2) by using an oxide film as a mask. Subsequently, a resist mask is formed on the surface of the p-type well region (3) so as to be separated from the oxide film mask, and an n+-type source region (5) is selectively formed from the separation portion. Subsequently, the oxide film mask is removed. Then, an oxide film is formed on the surface of the p-type well region (3), and the oxide film is removed. Subsequently, a gate electrode (7) coated with a gate oxide film (6) is formed on the surface of the semiconductor substrate.