Packaging method and packaging substrate for flip chip
The invention provides a packaging method and a packaging substrate for a flip chip. The packaging substrate comprises a substrate, substrate welding pads and substrate convex blocks, wherein the substrate is provided with a plurality of welding areas, each substrate welding pad is positioned on the...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | The invention provides a packaging method and a packaging substrate for a flip chip. The packaging substrate comprises a substrate, substrate welding pads and substrate convex blocks, wherein the substrate is provided with a plurality of welding areas, each substrate welding pad is positioned on the corresponding welding area, and the each substrate convex block is positioned on the corresponding substrate welding pad. The packaging substrate has the advantage that the packaging substrate is provided with the substrate convex blocks, the substrate convex blocks are used for welding a wafer convex block on a wafer, and the thinner wafer convex block can be manufactured when the flip chip is packaged by the packaging substrate, so the overflow of the wafer convex block in the manufacturing process is avoided, the short-circuiting of the adjacent wafer convex blocks is avoided when the wafer convex blocks and the packaging substrate are welded together, namely, the bridging condition of the convex blocks is avoided. |
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