Component embedded packaging structure, semiconductor device and manufacturing method of packaging structure
The invention provides a component embedded packaging structure, a semiconductor device and a manufacturing method of the packaging structure. The component embedded packaging structure comprises a bare chip, a first pin, a second pin, a first dielectric layer, a patterned conductive layer, a second...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | The invention provides a component embedded packaging structure, a semiconductor device and a manufacturing method of the packaging structure. The component embedded packaging structure comprises a bare chip, a first pin, a second pin, a first dielectric layer, a patterned conductive layer, a second dielectric layer and a conductive layer, wherein the bare chip is arranged on a bare chip pedestal; the first pin and the second pin are arranged at the periphery of the bare chip pedestal; the first dielectric layer covers the bare chip, the bare chip pedestal, the first pin and the second pin, and is provided with a first through hole exposed out of at least partial bare chip and a second through hole exposed out of at least partial second pin; one side surface of a first dielectric material is substantially flush with one side surface of the first pin; the patterned conductive layer is arranged on the upper surface of the first dielectric layer, electrically connected with the bare chip by the first through hole, and electrically connected with the second pin by the second through hole; the second dielectric layer is arranged on the first dielectric layer, and covers the patterned conductive layer; and the conductive layer wraps the upper surface and the side surface of the second dielectric layer and the side surface of the first dielectric layer, and is directly contacted with the side surface of the first pin. |
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