Device and method for carrying out complex multiplication and butterfly calculation by virtue of floating point unit of processor

The invention provides a device and a method for carrying out complex multiplication and butterfly calculation by virtue of a floating point unit of a processor. The floating point unit is divided into a floating point addition unit and a floating point multiplication unit, wherein a few interconnec...

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Bibliographische Detailangaben
Hauptverfasser:	YAN XIN, YANG LIANG, GAO XIANGQIANG, ZHOU QUAN, FENG CHUNYANG
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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