Matching loop full-digital type power quality monitoring device and method adopting three-tier architecture
The invention provides a matching loop full-digital type power quality monitoring device and method adopting three-tier architecture. The matching loop full-digital type power quality monitoring device comprises a data processing unit, a DSP calculating unit and an FPGA front unit. The data processi...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | The invention provides a matching loop full-digital type power quality monitoring device and method adopting three-tier architecture. The matching loop full-digital type power quality monitoring device comprises a data processing unit, a DSP calculating unit and an FPGA front unit. The data processing unit is connected with the DSP calculating unit connected with the FPGA front unit. The device has the advantages that the three-tier architecture and reasonable task distribution based on the characteristics of platforms of all layers are adopted, the data processing ability of the full-digital type power quality monitoring device is improved, and monitoring of the power quality up to five hundred and twelve wave points of each cycle and sixteen loops to the maximum is achieved; by means of a resampling technology, the problem that system fundamental frequency can not be tracked in the sampling process of a digital mutual inductor is solved, frequency tracking of digital sampling is achieved, the problem that spectrum leakage occurs when a sampling value of an original digital mutual inductor is utilized for harmonic analysis is solved, and the problem of effective value fluctuations generated when effective value calculating is carried out is solved. |
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