Parallel detection method for three-dimensional size defects of SOT packaging chip pin

The invention provides a parallel detection method for three-dimensional size defects of an SOT packaging chip pin. In the method, the detection process of a single SOT packaging chip is divided into seven procedures and respectively packaged in seven threads. The process thread function comprises a serial port detection thread, an image acquisition thread, an image detection thread, a result analysis thread, a synchronous code thread, an interface refresh thread and a database backup thread according to the detection process. The plurality of detection procedures for the SOT packaging chip are in parallel operation. Each of the image acquisition thread, the image detection thread and the result analysis thread comprises two modules, namely, a plane image detection module and a pin height detection module. With the method, parallel detection on the plurality of chips can be realized, plane pin size detection and three-dimensional parallel detection of the pin height can be realized, and the detection speed is