Memory timing optimization using pattern based signaling modulation

Memory timing optimization using pattern based signaling modulation

A method and apparatus are provided to determine a worst-case setup and hold bit pattern stream associated with a load on a bus, and determine a time shift to apply to an incoming bit pattern being conveyed relative to a DLL associated with the load.

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Bibliographische Detailangaben
Hauptverfasser: UDUEBHO OSEGHALE O, NORMAN ADAM J
Format: Patent
Sprache:chi ; eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Beschreibung
Zusammenfassung:A method and apparatus are provided to determine a worst-case setup and hold bit pattern stream associated with a load on a bus, and determine a time shift to apply to an incoming bit pattern being conveyed relative to a DLL associated with the load.