High die strength semiconductor wafer processing method and system

High die strength semiconductor wafer processing method and system

Embodiments of methods and systems for processing a semiconductor wafer are described. In one embodiment, a method for processing a semiconductor wafer involves performing laser stealth dicing on the semiconductor wafer to form a stealth dicing layer within the semiconductor wafer and after performi...

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Hauptverfasser: GUIDO ALBERMANN, THOMAS ROHLEDER, HARTMUT BUENNING, MARTIN LAPKE, SASCHA MOELLER
Format: Patent
Sprache:chi ; eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator GUIDO ALBERMANN
THOMAS ROHLEDER
HARTMUT BUENNING
MARTIN LAPKE
SASCHA MOELLER
description Embodiments of methods and systems for processing a semiconductor wafer are described. In one embodiment, a method for processing a semiconductor wafer involves performing laser stealth dicing on the semiconductor wafer to form a stealth dicing layer within the semiconductor wafer and after performing laser stealth dicing, cleaning the semiconductor wafer from a back-side surface of the semiconductor wafer with a blade to remove at least a portion of the stealth dicing layer. Other embodiments are also described.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN103887156A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN103887156A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN103887156A3</originalsourceid><addsrcrecordid>eNqNyr0KwjAUBtAsDlJ9h-sDFCxF7apF6eTkXkLyNQmYH3KviG_v4gM4neWs1WUKzpMNIJaK5MQTIwaTk30ZyZXeekGlUrMBc0iOIsRnSzpZ4g8L4katFv1kbH82ane7PsapRckzuGiDBJnHe7fvh-HUHY7n_p_zBWw0MoI</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>High die strength semiconductor wafer processing method and system</title><source>esp@cenet</source><creator>GUIDO ALBERMANN ; THOMAS ROHLEDER ; HARTMUT BUENNING ; MARTIN LAPKE ; SASCHA MOELLER</creator><creatorcontrib>GUIDO ALBERMANN ; THOMAS ROHLEDER ; HARTMUT BUENNING ; MARTIN LAPKE ; SASCHA MOELLER</creatorcontrib><description>Embodiments of methods and systems for processing a semiconductor wafer are described. In one embodiment, a method for processing a semiconductor wafer involves performing laser stealth dicing on the semiconductor wafer to form a stealth dicing layer within the semiconductor wafer and after performing laser stealth dicing, cleaning the semiconductor wafer from a back-side surface of the semiconductor wafer with a blade to remove at least a portion of the stealth dicing layer. Other embodiments are also described.</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2014</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20140625&amp;DB=EPODOC&amp;CC=CN&amp;NR=103887156A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25569,76552</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20140625&amp;DB=EPODOC&amp;CC=CN&amp;NR=103887156A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>GUIDO ALBERMANN</creatorcontrib><creatorcontrib>THOMAS ROHLEDER</creatorcontrib><creatorcontrib>HARTMUT BUENNING</creatorcontrib><creatorcontrib>MARTIN LAPKE</creatorcontrib><creatorcontrib>SASCHA MOELLER</creatorcontrib><title>High die strength semiconductor wafer processing method and system</title><description>Embodiments of methods and systems for processing a semiconductor wafer are described. In one embodiment, a method for processing a semiconductor wafer involves performing laser stealth dicing on the semiconductor wafer to form a stealth dicing layer within the semiconductor wafer and after performing laser stealth dicing, cleaning the semiconductor wafer from a back-side surface of the semiconductor wafer with a blade to remove at least a portion of the stealth dicing layer. Other embodiments are also described.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2014</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyr0KwjAUBtAsDlJ9h-sDFCxF7apF6eTkXkLyNQmYH3KviG_v4gM4neWs1WUKzpMNIJaK5MQTIwaTk30ZyZXeekGlUrMBc0iOIsRnSzpZ4g8L4katFv1kbH82ane7PsapRckzuGiDBJnHe7fvh-HUHY7n_p_zBWw0MoI</recordid><startdate>20140625</startdate><enddate>20140625</enddate><creator>GUIDO ALBERMANN</creator><creator>THOMAS ROHLEDER</creator><creator>HARTMUT BUENNING</creator><creator>MARTIN LAPKE</creator><creator>SASCHA MOELLER</creator><scope>EVB</scope></search><sort><creationdate>20140625</creationdate><title>High die strength semiconductor wafer processing method and system</title><author>GUIDO ALBERMANN ; THOMAS ROHLEDER ; HARTMUT BUENNING ; MARTIN LAPKE ; SASCHA MOELLER</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN103887156A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2014</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>GUIDO ALBERMANN</creatorcontrib><creatorcontrib>THOMAS ROHLEDER</creatorcontrib><creatorcontrib>HARTMUT BUENNING</creatorcontrib><creatorcontrib>MARTIN LAPKE</creatorcontrib><creatorcontrib>SASCHA MOELLER</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>GUIDO ALBERMANN</au><au>THOMAS ROHLEDER</au><au>HARTMUT BUENNING</au><au>MARTIN LAPKE</au><au>SASCHA MOELLER</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>High die strength semiconductor wafer processing method and system</title><date>2014-06-25</date><risdate>2014</risdate><abstract>Embodiments of methods and systems for processing a semiconductor wafer are described. In one embodiment, a method for processing a semiconductor wafer involves performing laser stealth dicing on the semiconductor wafer to form a stealth dicing layer within the semiconductor wafer and after performing laser stealth dicing, cleaning the semiconductor wafer from a back-side surface of the semiconductor wafer with a blade to remove at least a portion of the stealth dicing layer. Other embodiments are also described.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title High die strength semiconductor wafer processing method and system
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-16T07%3A19%3A48IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=GUIDO%20ALBERMANN&rft.date=2014-06-25&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN103887156A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true