Semiconductor device and method of manufacturing the same
The invention provides a semiconductor device and a method of manufacturing the same, wherein the semiconductor device is low in thermal resistance, high in density and good in heat resistance. A semiconductor device having a substrate including a plurality of external terminals on a rear surface an...
Gespeichert in:
| Hauptverfasser: | , , , |
|---|---|
| Format: | Patent |
| Sprache: | chi ; eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | SATO HIDENARI OOIDA MITSURU TOMONAGA YOSHIYUKI WATANABE KATSUMI |
| description | The invention provides a semiconductor device and a method of manufacturing the same, wherein the semiconductor device is low in thermal resistance, high in density and good in heat resistance. A semiconductor device having a substrate including a plurality of external terminals on a rear surface and a plurality of bonding terminals electrically connected to the plurality of external terminals on a front surface, a semiconductor chip mounted on the front surface of the substrate, a surface of the chip including a plurality of bonding pads, a plurality of bonding wires connecting between the plurality of bonding pads or between the plurality of bonding terminals and the plurality of bonding wires respectively, a first sealing layer sealing the front surface of the substrate, the plurality of bonding wires and the semiconductor chip, and a second sealing layer comprised of the same material as the first sealing, the second sealing layer being formed above the first sealing layer. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN103871979A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN103871979A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN103871979A3</originalsourceid><addsrcrecordid>eNrjZLAMTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE0tychPUchPU8hNzCtNS0wuKS3KzEtXKMlIVShOzE3lYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxzn6GBsYW5oaW5paOxsSoAQBMyC7N</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device and method of manufacturing the same</title><source>esp@cenet</source><creator>SATO HIDENARI ; OOIDA MITSURU ; TOMONAGA YOSHIYUKI ; WATANABE KATSUMI</creator><creatorcontrib>SATO HIDENARI ; OOIDA MITSURU ; TOMONAGA YOSHIYUKI ; WATANABE KATSUMI</creatorcontrib><description>The invention provides a semiconductor device and a method of manufacturing the same, wherein the semiconductor device is low in thermal resistance, high in density and good in heat resistance. A semiconductor device having a substrate including a plurality of external terminals on a rear surface and a plurality of bonding terminals electrically connected to the plurality of external terminals on a front surface, a semiconductor chip mounted on the front surface of the substrate, a surface of the chip including a plurality of bonding pads, a plurality of bonding wires connecting between the plurality of bonding pads or between the plurality of bonding terminals and the plurality of bonding wires respectively, a first sealing layer sealing the front surface of the substrate, the plurality of bonding wires and the semiconductor chip, and a second sealing layer comprised of the same material as the first sealing, the second sealing layer being formed above the first sealing layer.</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2014</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140618&DB=EPODOC&CC=CN&NR=103871979A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140618&DB=EPODOC&CC=CN&NR=103871979A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SATO HIDENARI</creatorcontrib><creatorcontrib>OOIDA MITSURU</creatorcontrib><creatorcontrib>TOMONAGA YOSHIYUKI</creatorcontrib><creatorcontrib>WATANABE KATSUMI</creatorcontrib><title>Semiconductor device and method of manufacturing the same</title><description>The invention provides a semiconductor device and a method of manufacturing the same, wherein the semiconductor device is low in thermal resistance, high in density and good in heat resistance. A semiconductor device having a substrate including a plurality of external terminals on a rear surface and a plurality of bonding terminals electrically connected to the plurality of external terminals on a front surface, a semiconductor chip mounted on the front surface of the substrate, a surface of the chip including a plurality of bonding pads, a plurality of bonding wires connecting between the plurality of bonding pads or between the plurality of bonding terminals and the plurality of bonding wires respectively, a first sealing layer sealing the front surface of the substrate, the plurality of bonding wires and the semiconductor chip, and a second sealing layer comprised of the same material as the first sealing, the second sealing layer being formed above the first sealing layer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2014</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAMTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE0tychPUchPU8hNzCtNS0wuKS3KzEtXKMlIVShOzE3lYWBNS8wpTuWF0twMim6uIc4euqkF-fGpxQWJyal5qSXxzn6GBsYW5oaW5paOxsSoAQBMyC7N</recordid><startdate>20140618</startdate><enddate>20140618</enddate><creator>SATO HIDENARI</creator><creator>OOIDA MITSURU</creator><creator>TOMONAGA YOSHIYUKI</creator><creator>WATANABE KATSUMI</creator><scope>EVB</scope></search><sort><creationdate>20140618</creationdate><title>Semiconductor device and method of manufacturing the same</title><author>SATO HIDENARI ; OOIDA MITSURU ; TOMONAGA YOSHIYUKI ; WATANABE KATSUMI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN103871979A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2014</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>SATO HIDENARI</creatorcontrib><creatorcontrib>OOIDA MITSURU</creatorcontrib><creatorcontrib>TOMONAGA YOSHIYUKI</creatorcontrib><creatorcontrib>WATANABE KATSUMI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SATO HIDENARI</au><au>OOIDA MITSURU</au><au>TOMONAGA YOSHIYUKI</au><au>WATANABE KATSUMI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device and method of manufacturing the same</title><date>2014-06-18</date><risdate>2014</risdate><abstract>The invention provides a semiconductor device and a method of manufacturing the same, wherein the semiconductor device is low in thermal resistance, high in density and good in heat resistance. A semiconductor device having a substrate including a plurality of external terminals on a rear surface and a plurality of bonding terminals electrically connected to the plurality of external terminals on a front surface, a semiconductor chip mounted on the front surface of the substrate, a surface of the chip including a plurality of bonding pads, a plurality of bonding wires connecting between the plurality of bonding pads or between the plurality of bonding terminals and the plurality of bonding wires respectively, a first sealing layer sealing the front surface of the substrate, the plurality of bonding wires and the semiconductor chip, and a second sealing layer comprised of the same material as the first sealing, the second sealing layer being formed above the first sealing layer.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | chi ; eng |
| recordid | cdi_epo_espacenet_CN103871979A |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Semiconductor device and method of manufacturing the same |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-25T20%3A47%3A45IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SATO%20HIDENARI&rft.date=2014-06-18&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN103871979A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |