Chip fault positioning method, device and system
The invention provides a chip fault positioning method, device and system. The chip fault positioning method includes the steps: acquiring and executing debugging instructions in a debugging mode; acquiring scanning chain mode instructions in a test mode; controlling a trigger of a chip to form a sc...
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| Hauptverfasser: | , |
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| Format: | Patent |
| Sprache: | chi ; eng |
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| Zusammenfassung: | The invention provides a chip fault positioning method, device and system. The chip fault positioning method includes the steps: acquiring and executing debugging instructions in a debugging mode; acquiring scanning chain mode instructions in a test mode; controlling a trigger of a chip to form a scanning chain according to the scanning chain mode instructions; acquiring test data in the test mode; inputting the test data to the scanning chain, and sequentially removing values of the trigger in the scanning chain; positioning a chip fault position according to the removed values of the trigger. Fault positioning efficiency and accuracy are improved. |
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