Semiconductor element spacing structure and forming method thereof
The invention provides a semiconductor element spacing structure and a forming method of the semiconductor element spacing structure. The semiconductor element spacing structure comprises a substrate, a semiconductor element unit array, multiple shallow trench isolation (STI) structures formed betwe...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention provides a semiconductor element spacing structure and a forming method of the semiconductor element spacing structure. The semiconductor element spacing structure comprises a substrate, a semiconductor element unit array, multiple shallow trench isolation (STI) structures formed between adjacent two rows of semiconductor element units, multiple STI structures formed between two adjacent semiconductor element units of different sorts in the same row and multiple local oxidation of silicon (LOCOS) isolation structures formed between two adjacent semiconductor element units of the same sort in the same row. The surface of the top of the substrate comprises a first mixing zone and a second mixing zone. Each semiconductor element unit is a first-class semiconductor element unit or a second-class semiconductor element unit. The semiconductor element spacing structure and the forming method of the semiconductor element spacing structure can reduce leakage among elements under a radiating condition, si |
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