Field-programmable gate array (FPGA) chip for SM2 digital signature verification algorithm

The invention discloses a field-programmable gate array (FPGA) chip for an SM2 digital signature verification algorithm. The FPGA chip comprises a system bus interface, an SM2 controller and an SM2 operation unit, and the system bus interface is used for communicating with an external system of the FPGA chip, acquiring parameters and data which are required by SM2 digital signature verification from the external system , writing the parameters and the data in the SM2 controller, receiving a control message, a work state query message and an operation result query message which are sent by the external system and sending the control message, the work state query message and the operation result query message to the SM2 controller; the SM2 controller is used for triggering the SM2 operation unit according to the control message and sending a work state and a verification result of the SM2 operation unit to the external system through the system bus interface after the SM2 controller receives the work state quer