Semiconductor chip

The invention provies a semiconductor chip. In a chip mounting multiple RAMs, a repair circuit and a repair design method in consideration of a trade-off of chip yield and area increase along with mounting a repair circuit are provided. A repair circuit achieving 'group repair of mixed multiple...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: YAMASAKI KANAME, MATSUMOTO CHIZU, SAITOU YOSHIKAZU, NAKAO MICHINOBU
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:The invention provies a semiconductor chip. In a chip mounting multiple RAMs, a repair circuit and a repair design method in consideration of a trade-off of chip yield and area increase along with mounting a repair circuit are provided. A repair circuit achieving 'group repair of mixed multiple repair methods' which can select existence of a repair circuit, and one or more repair methods from I/O, column, and row repairs on the RAMS in the chip, respectively, when a repair circuit is mounted. The repair circuit performs repair per RAM group by sorting the RAMs mounting a repair circuit into a plurality of RAM groups. Also, a repair method which makes a number of acquired good chips in a wafer and an estimation method of the RAM grouping method are provided. A repair circuit achieving 'group repair of mixed multiple repair methods' and a repair design method for making a product margin suitable are provided.