Structure and layout method of circuit module via chain

A structure and a layout method of a circuit module via chain can be applied to an advanced integrated circuit manufacture procedure and an integrated circuit test, an compared with existing via chain structures, the circuit module via chain structure in the invention comprises a plurality of metal...

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Hauptverfasser:	CHEN GUANYU, LI XINHONG, FANG BOXIANG, CAI MINGFAN
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS SEMICONDUCTOR DEVICES TESTING
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creator	CHEN GUANYU LI XINHONG FANG BOXIANG CAI MINGFAN
description	A structure and a layout method of a circuit module via chain can be applied to an advanced integrated circuit manufacture procedure and an integrated circuit test, an compared with existing via chain structures, the circuit module via chain structure in the invention comprises a plurality of metal sheets which are annularly arranged, can significantly improve RF coupling and reduce crosstalk effects, in terms of the circumstance of feeding in AC signals or RF signals for testing, can prevent existing of fringing parasitic capacitance Cp of a certain degree, prevent an error in estimating a resistance value of a via, and further improve the overall integrated circuit manufacture procedure and the testing reliability.
format	Patent
fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN102810493A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN102810493A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN102810493A3</originalsourceid><addsrcrecordid>eNrjZDAPLikqTS4pLUpVSMxLUchJrMwvLVHITS3JyE9RyE9TSM4sSi7NBIrkp5TmpCqUZSYqJGckZubxMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjU4oLE5NS81JJ4Zz9DAyMLQwMTS2NHY2LUAADP6S3K</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Structure and layout method of circuit module via chain</title><source>esp@cenet</source><creator>CHEN GUANYU ; LI XINHONG ; FANG BOXIANG ; CAI MINGFAN</creator><creatorcontrib>CHEN GUANYU ; LI XINHONG ; FANG BOXIANG ; CAI MINGFAN</creatorcontrib><description>A structure and a layout method of a circuit module via chain can be applied to an advanced integrated circuit manufacture procedure and an integrated circuit test, an compared with existing via chain structures, the circuit module via chain structure in the invention comprises a plurality of metal sheets which are annularly arranged, can significantly improve RF coupling and reduce crosstalk effects, in terms of the circumstance of feeding in AC signals or RF signals for testing, can prevent existing of fringing parasitic capacitance Cp of a certain degree, prevent an error in estimating a resistance value of a via, and further improve the overall integrated circuit manufacture procedure and the testing reliability.</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; SEMICONDUCTOR DEVICES ; TESTING</subject><creationdate>2012</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20121205&DB=EPODOC&CC=CN&NR=102810493A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20121205&DB=EPODOC&CC=CN&NR=102810493A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHEN GUANYU</creatorcontrib><creatorcontrib>LI XINHONG</creatorcontrib><creatorcontrib>FANG BOXIANG</creatorcontrib><creatorcontrib>CAI MINGFAN</creatorcontrib><title>Structure and layout method of circuit module via chain</title><description>A structure and a layout method of a circuit module via chain can be applied to an advanced integrated circuit manufacture procedure and an integrated circuit test, an compared with existing via chain structures, the circuit module via chain structure in the invention comprises a plurality of metal sheets which are annularly arranged, can significantly improve RF coupling and reduce crosstalk effects, in terms of the circumstance of feeding in AC signals or RF signals for testing, can prevent existing of fringing parasitic capacitance Cp of a certain degree, prevent an error in estimating a resistance value of a via, and further improve the overall integrated circuit manufacture procedure and the testing reliability.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2012</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAPLikqTS4pLUpVSMxLUchJrMwvLVHITS3JyE9RyE9TSM4sSi7NBIrkp5TmpCqUZSYqJGckZubxMLCmJeYUp_JCaW4GRTfXEGcP3dSC_PjU4oLE5NS81JJ4Zz9DAyMLQwMTS2NHY2LUAADP6S3K</recordid><startdate>20121205</startdate><enddate>20121205</enddate><creator>CHEN GUANYU</creator><creator>LI XINHONG</creator><creator>FANG BOXIANG</creator><creator>CAI MINGFAN</creator><scope>EVB</scope></search><sort><creationdate>20121205</creationdate><title>Structure and layout method of circuit module via chain</title><author>CHEN GUANYU ; LI XINHONG ; FANG BOXIANG ; CAI MINGFAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN102810493A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2012</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>CHEN GUANYU</creatorcontrib><creatorcontrib>LI XINHONG</creatorcontrib><creatorcontrib>FANG BOXIANG</creatorcontrib><creatorcontrib>CAI MINGFAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHEN GUANYU</au><au>LI XINHONG</au><au>FANG BOXIANG</au><au>CAI MINGFAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Structure and layout method of circuit module via chain</title><date>2012-12-05</date><risdate>2012</risdate><abstract>A structure and a layout method of a circuit module via chain can be applied to an advanced integrated circuit manufacture procedure and an integrated circuit test, an compared with existing via chain structures, the circuit module via chain structure in the invention comprises a plurality of metal sheets which are annularly arranged, can significantly improve RF coupling and reduce crosstalk effects, in terms of the circumstance of feeding in AC signals or RF signals for testing, can prevent existing of fringing parasitic capacitance Cp of a certain degree, prevent an error in estimating a resistance value of a via, and further improve the overall integrated circuit manufacture procedure and the testing reliability.</abstract><oa>free_for_read</oa></addata></record>
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recordid	cdi_epo_espacenet_CN102810493A
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subjects	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS SEMICONDUCTOR DEVICES TESTING
title	Structure and layout method of circuit module via chain
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-30T06%3A11%3A55IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHEN%20GUANYU&rft.date=2012-12-05&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN102810493A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true