Methods for processing silicon on insulator wafers

Methods are provided for etching and/or depositing an epitaxial layer on a silicon-on-insulator structure comprising a handle wafer, a silicon layer, and a dielectric layer between the handle wafer and the silicon layer. The silicon layer has a cleaved surface defining an outer surface of the struct...

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Bibliographische Detailangaben
Hauptverfasser: DHUMAL SWAPNIL Y, TORACK THOMAS A, FLANNERY LAWRENCE P, PITNEY JOHN A
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:Methods are provided for etching and/or depositing an epitaxial layer on a silicon-on-insulator structure comprising a handle wafer, a silicon layer, and a dielectric layer between the handle wafer and the silicon layer. The silicon layer has a cleaved surface defining an outer surface of the structure. The cleaved surface of wafer is then etched while controlling a temperature of the reactor such that the etching reaction is kinetically limited. An epitaxial layer is then deposited on the wafer while controlling the temperature of the reactor such that a rate of deposition on the cleaved surface is kinetically limited.