Multiple input and multiple clock D trigger with maintaining obstructive type

The invention discloses a multiple input and multiple clock D trigger with a maintaining obstructive type. The trigger comprises a multiple-input basic latch and two or more than two input units. Two output terminals of any the input unit are respectively connected with an input terminal of the multiple-input basic latch so as to form a maintaining obstructive D trigger. The input units include data input terminals and clock trigger terminals. According to the invention, the D trigger can be utilized as a common memory; and the D trigger can also be applied to a design of a sequential circuit, especially to designs of a distributed system and an asynchronous circuit, wherein the distributed system and the asynchronous circuit are driven by events. Moreover, compared with the current trigger, the D trigger enables the circuit of trigger to be directly driven by events in a multi-path data input situation; circuit selection by data is simple; and the storage speed is fast.